1. Field of the Invention
The present invention relates to semiconductor wafer processing and, more particularly, to apparatuses and techniques for more effectively conducting patterning a photoresist in a photolithographic operation.
2. Description of the Related Art
The ability to work selectively on small well defined areas of a substrate is paramount in the manufacture of semiconductor devices. In the continuing quest to achieve higher levels of performance and higher functional density of the semiconductor devices, the microelectronics industry is committed to applying new processes to further reduce the minimum feature sizes of the semiconductor devices.
FIG. 1 shows an example of a simplified photolithographic operation 20. In the operation 20, a light source 26 generates light which is passed through a reticle 28. Reticles are generally manufactured by depositing a chromium photomask on a glass plate that is transparent. The photomask is then typically coated with a resist, and then a pattern is defined in the resist by usage of a pattern generator. The resist is then developed after which the photomask is chemically processed to remove everything but the pattern from the glass plate. To define a pattern in the resist, the pattern generator utilizes an electron beam to generate the features in the resist. The light passed though the reticle 28 may then pattern a photoresist 24 that has been applied to a surface of the substrate 22. The photoresist may then be processed as known by those skilled in the art to generate the desired features on the substrate 22.
As feature sizes are reduced, the devices can become smaller or remain the same size but become more densely packed. As such, advances in lithographic technologies used to pattern the semiconductor devices must keep pace with the progress to reduce feature sizes, in order to allow for smaller and more dense semiconductor devices. In order to do this, the lithographic technology must increasingly improve its ability to resolve smaller and smaller line widths. The resolution limit is in good part determined by the wavelength of light used to pattern the photoresist. Therefore one of the main ways to reduce the device critical dimensions (CD) through lithographic technologies has been to continually reduce the wavelength of the radiation used to expose the photoresist to yield well-defined pattern profiles.
High resolution lithographic transmission becomes more of a challenge as wafers progress to higher density chips with shrinking geometries. Furthermore, as metallization interconnect technology transitions to dual damascene processes, lithography techniques to pattern holes or trenches in the dielectric become more critical and has a direct impact on yield and reliability. In particular, optical lithographic methods utilizing shorter wavelengths are often utilized to pattern the photoresist. For example, attempts to use wavelengths as low as 157 nm have been made. Unfortunately, present optical lithographic methods and tools have to be changed to utilize this shorter wavelength. Regrettably, to change over to the 157 nm wavelength from a higher wavelength process, optical lithographic tools must generally be changed such as using different materials for optics and different lens concepts, as well as changing the photomask materials.
Therefore, there is a need for a method and an apparatus that can utilize the same masks, resists, and lens concepts as existing systems but at the same time also provide the sharper pattern profile that results from using shorter wavelengths to pattern the photoresist.